Utopia 2

mleveneu — Mon, 15 Jul 2019 13:08:26 +0000

Utopia 2 mleveneu Mon, 07/15/2019 - 15:08

Next generation radiation monitors

HSE-RP-IL team is carrying out extensive research to realize a one chip ASIC solution for the front end electronics of Ionization chambers. The designed ASIC is forecasted to encompass the functionalities of most of the discrete components of CROME like the IVC based analog processing and FPGA based digital section. Two versions of prototypes for the analog front end have been designed named UTOPIA 1 and UTOPIA 2. The Ultalow Picoammeter (UTOPIA) series of chips were designed using AMS 350nm technology. UTOPIA 1 helped in identifying the main sources of leakage currents while employing AMS 350 technology for a low current measurement application. Based on the results from the UTOPIA 1, the second generation chip, UTOPIA 2, was designed which is proven to be able to measure currents from 1 fA to 5 uA. The characterization of the chip in pulsed radiation field is ongoing.

Utopia1

Utopia 2

Strap

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Accurate Front End (ASIC)

hboukaba — Mon, 15 Jul 2019 13:05:02 +0000

Accurate Front End (ASIC) hboukaba Mon, 07/15/2019 - 15:05

Ionizing radiation detection at CERN has been carried out primarily by using various kinds of ionization chambers. A study of the characteristics of these chambers reveals that while measuring environmental background radiation, the output could be as low as 2 fA. In an attempt to measure the output of various ionization chambers, two ASICs named UTOPIA1 and UTOPIA2 were developed at the radiation protection team of CERN. The ASICs were designed in 350 nm technology from AMS owing to its low leakage characteristics.

UTOPIA 1: Ultra low Picoammeter 1 (2014) Technology : AMS 350 nm Measurement range : 12 fA to 5 uA Primary Objective: To characterise the different leakage currents Number of channels : 4
UTOPIA 2 : (2016) Technology : AMS 350 nm Measurement range : 1 fA to 5 uA Primary objective: 9 decade current measurement ASIC Number of channels: 2

Since leakage currents are the primary limiting factor in designs for low current measurements, designing in lower technology nodes is highly challenging. Because of the continuous scaling down of the gate oxide thickness in the advanced technology nodes, the gate leakage increases substantially and becomes a significant contributor to overall leakage current. This work exploits the potential employability of an advanced node in low current measurement designs and aims at exploring the associated challenges and solutions. A chip was designed using GLOBALFOUNDRIES© 22 nm FDSOI technology in this framework :

Accurate 0 : (2018)
- Technology : GF 22FDX
- Measurement range : 1 fA to 1 nA
- Primary objective: Technology evaluation for leakage currents
- Number of channels: 3

In 2019, following to a meeting with EP-ESE-ME experts, we have decided to use CERN main stream technology and a new chip using was designed :

Accurate 1: (2019)
- Technology : TSMC 130 nm
- Measurement range : 1 fA to 1 uA
- Primary objective: Technology evaluation for leakage currents
- Number of channels: 2

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